1. Field of the Invention
The present invention relates to semiconductor memory devices and methods for fabricating the same, and more particularly relates to semiconductor memory devices which include stacked capacitors, and methods for fabricating the same.
2. Background Art
Among DRAMs (dynamic random-access memories), which have been downsized continuously, particularly for DRAMs including stacked capacitors, high-dielectric-constant insulating films, made of Ta2O5, Al2O3, HfO2 or the like, have been proposed and many of those films have been put into practical use in order to achieve a certain amount of accumulated charge.
However, it has been known that the reliability of these high dielectric constant materials and ferroelectric materials deteriorates due to plasma damage or the like caused when interconnection is formed after formation of capacitors, e.g., when contacts connected to the upper electrodes are formed. To overcome this, several methods for avoiding such plasma damage have also been proposed.
Hereinafter, a ferroelectric memory and a method for fabricating the same, disclosed in Japanese Laid-Open Publication No. 2002-198494, will be described with reference to FIG. 28.
As shown in FIG. 28, a first interlayer dielectric film 112 is formed on a semiconductor substrate 100 having memory cell transistors and doped layers 111 formed therein. In the first interlayer dielectric film 112, first plugs 113, which are connected to the memory cell transistors, and a second plug 114, which is connected to one of the doped layers 111, are provided. Next, capacitor lower electrodes 115, which are connected to the first plugs 113, a capacitor insulating film 118, which is formed of a ferroelectric film, and a capacitor upper electrode 119, which extends beyond the outside of the capacitor insulating film 118 and is electrically connected to the second plug 114, are formed in this order over the first interlayer dielectric film 112. Subsequently, a second interlayer dielectric film 120 is formed over the capacitor upper electrode 119. Then, a third plug 121 for connecting the other doped layer 111 and an upper interconnect 122 is formed through the interlayer dielectric films.